Skip to main content

Sonata Software is hiring SAP ABAP/XI Lead

Company Name: Sonata Software

Job Description: SAP ABAP/XI Lead

Working Experience: 5 - 8 Years

Work Location: Bangalore

Qualification: BE/ B Tech / ME/ M Tech / MCA / Any degree

Primary Skill Requirement
Good in RICEF

Should have hands on experience in ABAP interfaces using IDocs, BAPIs, RFC and webservices

Should have hands on experience in configuring XI scenarios using

Mapping (Graphical, XSLT, ABAP, JAVA)

Should have hands on experience in configuring adapters such as File, SOAP, Mail, IDoc, RFC, HTTP, JDBC etc.

Should have hands on experience in configuring and developing ABAP Proxy

Hands on Experience on Using standard functions, Node functions and user defined function

Value mapping

BPM and alert configuration

Important criteria/consideration
No. of open positions: 1
Project: Internal

Mode of Hiring: Direct Hire/FTE/Contract

Contact Details: APS Trust Building, Bull Temple Road, N. R. Colony, Bangalore 560 019

Phone: +91-080-3097 1999

Mail ID: Yogesh.hs@sonata-software.com
Labels:

Popular posts from this blog

Aricent Technologies holdings is hiring for Senior Software Engineer

Aricent Technologies holdings is hiring for Senior Software Engineer Entity Name: Aricent Technologies Holdings Private Limited Job description: Senior Software Engineer Job Reference: 42462 Work Experience:  3 – 5 Years Salary: Not Disclosed Educational Qualification: BE Work location: Bengaluru Desired profile Individual Contributor, Excellent technical aptitude, lead team technically, deep exposure to LTE MAc layer or RLC/PDCP layer implementation Mandatory Skills: C / C++ Interested candidates can apply the job through this link  https://bit.ly/2mN4Q5H Website:  https://www.aricent.com/ Company Address: Aricent Technologies Holdings Limited, 18/1, Outer Ring Rd, Chandana, Panathur Post, Bengaluru 560103 Telephone: 080 4106 7000 Company profile Aricent is a global design and engineering company innovating for customers in the digital era. We help our clients lead into the future by solving their most complex and mission
Read more

Intel Corporation hiring for Pre-Silicon Verification Engineer

Company Name: Intel Corporation Job Description: Pre-Silicon Verification Engineer Job Number: 706106 Description In this position, the candidate will be responsible for verification of soft IP cores for Intel's next generation chips (including SOCs) for the different market segments. Candidate will develop various Verification components like scoreboard, monitors, checkers and overall Verification environment Develops pre-Silicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models. Qualifications Master of Science (or a Master of Technology) degree in Electrical Engineering with more than three years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than five years of relevant industry experience. Experience: Expertise in system Verilog, and OVM based verification meth
Post a Comment
Read more

Smartplay Technologies is hiring Senior/lead Engineer - Asic Verification - 25 Opening(s)

Company Name: Smartplay Technologies (I) Private Limited Job Description: Senior/lead Engineer - Asic Verification Number of Requirements: 25 Openings Work Experience: 3 – 8 Years Work Location: Bangalore/Noida/Chennai Job Reference: SP_DV_06252013 Compensation: INR 600,000 – 1,600,000 P.A Education: UG - B. Tech/B.E. - Any Specialization, Computers, Electrical, Electronics/Telecommunication PG - M. Tech - Any Specialization, Computers, Electrical, Electronics/Telecommunication DOCTORATE - Any Doctorate - Any Specialization, Doctorate Not Required Job Description Job Responsibility Knowledge of Code coverage using features in existing simulators or stand alone tools like Surecov, HDL score etc. Working on full chip verification and VVM/RVM technology / System Verilog is a must, worked on passing test cases, test benches, Building environment. Knowledge of Functional coverage using HVL language features or assertions a plus.Proficiency i
Read more