Company Name: Qualcomm India Private Limited
Job Description: DFT Specialist
Job Reference: E1920690
Work Experience: 8 – 12 Years
Work Location: Bangalore
Education: UG - Any Graduate
PG - Any Postgraduate
DOCTORATE - Doctorate Not Required
Job Description
The person hired into this role will be responsible for all DFT
aspects of SoC design and implementation, along with cores used in the SoC.
Owns DFT implementation and drives execution of architecting best DFT
solution to enable low DPMM (100), low test cost, with 99.5% test coverage for
static ATPG, 90% test coverage for transition delay test and ease of overall
implementation.
Responsible for driving the team to deliver on time the deliverables.
Drives team to execute in a timely fashion, being able to technically
mentor the team he leads and increase the technical depth of the entire team.
Responsible for aligning and engaging with all stake holders (PD, STA,
front-end, pattern delivery team, etc.), commit schedule and deliver per
commitment
Contribute to technical innovation, development of innovative
techniques in the area of DFT to save test cost, improve quality.
Responsible for DFT insertion for best compression and highest
quality, meeting ATPG coverage goals for static, Transition and IDDQ, test mode
STA constraints, test mode timing closure & sign-off
Responsible for supporting post Si debug effort, issue resolution
Desired Profile
Minimum of 8-12 year experience in ASIC/DFT and various aspects of DFT
Detailed knowledge on DFT concepts
In depth knowledge and hands on experience in scan insertion, ATPG,
coverage analysis, Transition delay test coverage analysis
In-depth knowledge and hands on experience in test clock planning and
implementation
Expertise in test mode timing constraints definition, knowledge in
providing timing fixes/corrective actions for timing violaitons
Expertise in scripting languages such as perl, shell, etc.
Knowledge/experience in post Si debg support
Experience in simulating test vectors
Knowledge of equivalence check, DFT DRC rules both in RTL lint tool
(like spyglass) and ATPG tool like (TetraMax)
Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter
Test is a plus
Ability to work in an international team, dynamic environment
Ability to learn and adapt to new tools and methodologies.
Ability to do multi-tasking & work on several high priority
designs in parallel.
Excellent problem solving skills
Excellent communication and team work skills and good English is
required
Contact Details: Qualcomm India Private Limited, Plot No’s 125 – 127, EPIP,
Phase II Whitefield
Export Promotion Industrial Park, Bangalore 560
066Website: www.qualcomm.co.in